Design of ALU and Code Converter Using Matrix Calculation

Nirina Gilbert Rasolofoson; Raoelina Andriambololona

doi:doi:10.11648/j.pamj.20170603.11

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Design of ALU and Code Converter Using Matrix Calculation

Nirina Gilbert Rasolofoson, Raoelina Andriambololona

Published in Pure and Applied Mathematics Journal (Volume 6, Issue 3)

Received: 3 April 2017 Accepted: 15 April 2017 Published: 27 May 2017

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Abstract

Arithmetic Logic Unit (ALU) is a fundamental building block of a central processing unit (CPU) in any computing system. The ALU is the hardware that performs logical (and, or, xor) and basic arithmetic (addition, subtraction, multiplication, division) operations. Thus, its construction requires techniques in which the treatment of operands should be consistent with operations rules. In this paper, ALU based on matrix calculation introduced and developed by Raoelina Andriambololona is proposed. These techniques aim to remove illogic and inconsistent appearing in the international writing numeration with the usual rules in arithmetic. We also propose the design of code converters which convert Binary to BCD (Binary Coded Decimal) code and vice versa using matrix calculation.

Published in	Pure and Applied Mathematics Journal (Volume 6, Issue 3)
DOI	10.11648/j.pamj.20170603.11
Page(s)	89-100
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2017. Published by Science Publishing Group

Keywords

ALU, Arithmetic, Numeration, Matrix Calculation, Code Converter

References

[1]	Raoelina Andriambololona, “Théorie générale des numérations écrite et parlée". Bull. Acad. Malg. LXIV./1-2, Antananarivo, Madagascar, 1986.
[2]	Raoelina Andriambololona, "Théorie générale des numérations écrite et parlée. II Utilisation du calcul matriciel en arithmétique. Nouvelle proposition d’écriture, d’énoncé des règles d’addition et de multiplication des nombres.".Bull. Acad.Malg LXV/1-2, Antananarivo, Madagascar, 1987.
[3]	Raoelina Andriambololona, “Théorie générale des numérations écrite et parlée. II- Utilisation du calcul matriciel en arithmétique. Application au changement de bases de numération. Bull. Acad. Malg. LXV./1-2, Antananarivo, Madagascar ”, 1987 (1989).
[4]	Raoelina Andriambololona, Ravo Tokiniaina Ranaivoson, Wilfrid Chrysante Solofoarisina. Arithmetic and Matricial Calculation. Pure and Applied Mathematics Journal. Vol. 5, No. 3, 2016, pp. 82-86. doi: 10.11648/j.pamj.20160503.14.
[5]	Raoelina Andriambololona, Hanitriarivo Rakotoson “Mpikajy elekronika sy siantifika mampiasa ny fomba fanisana Malagasy (Electronic and scientific calculator based on malagasy counting method)”, communication at the Academie Malgache, Antananarivo Madagascar, 05 June 2008.
[6]	Raoelina Andriambololona, “Algèbre linéaire et multilinéaire”, Collection LIRA, INSTN-Madagascar, Antananarivo, Madagascar, 1986.
[7]	Priyanka Yadav, Gaurav Kumar, Sumita Gupta, “Design and Implementation of 4-Bit Arithmetic and Logic Unit Chip with the Constraint of Power Consumption”, IOSR Journal of Electronics and Communication Engineering, 2014.
[8]	M. Morris Mano, Charles Kime. “Logic and computer design fundamentals.” (4th ed.). Pearson, 2014.
[9]	Osama Al-Khaleel, Mohammad Al-Khaleel, Zakaria Al-QudahJ, Christos A. Papachristou, Khaldoon Mhaidat, Francis G. Wolff, “Fast binary/decimal adder/subtractor with a novel correction-free BCD addition”, Electronics, Circuits and Systems (ICECS), 2011.
[10]	Deshpande Akshay, Sanidhya Mohan Sharma, Lochan Anil Vyas and K. Sivasankaran. Design of Low Power and Area Efficient 4-bit Arithmetic and Logic Unit using Nanoscale FinFET. Indian Journal of Science and Technology, Vol 8(S2), 250-256, Jan 2015. doi:10.17485/ijst/2015/v8iS2/70759.
[11]	Sneh Lata Murotiya, Anu Gupta. Design of CNTFET-based 2-bit ternary ALU for nanoelectronics. International Journal of Electronics. Volume 101, 2014, Pages 1244-1257. http://dx.doi.org/10.1080/00207217.2013.828191.
[12]	Garima Rawat, Khyati Rathore, Siddharth Goyal. Design and analysis of ALU: Vedic mathematics approach. International Conference on Computing, Communication & Automation (ICCCA), 2015. doi: 10.1109/CCAA.2015.7148593.
[13]	Simge Öztunç, Ali Mutlu, Necdet Bildik, Computing Hypercrossed Complex Pairings in Digital Images, Abstract and Applied Analysis, Volume 2013 (2013), Article ID 675373, http://dx.doi.org/10.1155/2013/675373.

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APA Style

Nirina Gilbert Rasolofoson, Raoelina Andriambololona. (2017). Design of ALU and Code Converter Using Matrix Calculation. Pure and Applied Mathematics Journal, 6(3), 89-100. https://doi.org/10.11648/j.pamj.20170603.11

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ACS Style

Nirina Gilbert Rasolofoson; Raoelina Andriambololona. Design of ALU and Code Converter Using Matrix Calculation. Pure Appl. Math. J. 2017, 6(3), 89-100. doi: 10.11648/j.pamj.20170603.11

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AMA Style

Nirina Gilbert Rasolofoson, Raoelina Andriambololona. Design of ALU and Code Converter Using Matrix Calculation. Pure Appl Math J. 2017;6(3):89-100. doi: 10.11648/j.pamj.20170603.11

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@article{10.11648/j.pamj.20170603.11,
  author = {Nirina Gilbert Rasolofoson and Raoelina Andriambololona},
  title = {Design of ALU and Code Converter Using Matrix Calculation},
  journal = {Pure and Applied Mathematics Journal},
  volume = {6},
  number = {3},
  pages = {89-100},
  doi = {10.11648/j.pamj.20170603.11},
  url = {https://doi.org/10.11648/j.pamj.20170603.11},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.pamj.20170603.11},
  abstract = {Arithmetic Logic Unit (ALU) is a fundamental building block of a central processing unit (CPU) in any computing system. The ALU is the hardware that performs logical (and, or, xor) and basic arithmetic (addition, subtraction, multiplication, division) operations. Thus, its construction requires techniques in which the treatment of operands should be consistent with operations rules. In this paper, ALU based on matrix calculation introduced and developed by Raoelina Andriambololona is proposed. These techniques aim to remove illogic and inconsistent appearing in the international writing numeration with the usual rules in arithmetic. We also propose the design of code converters which convert Binary to BCD (Binary Coded Decimal) code and vice versa using matrix calculation.},
 year = {2017}
}

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TY  - JOUR
T1  - Design of ALU and Code Converter Using Matrix Calculation
AU  - Nirina Gilbert Rasolofoson
AU  - Raoelina Andriambololona
Y1  - 2017/05/27
PY  - 2017
N1  - https://doi.org/10.11648/j.pamj.20170603.11
DO  - 10.11648/j.pamj.20170603.11
T2  - Pure and Applied Mathematics Journal
JF  - Pure and Applied Mathematics Journal
JO  - Pure and Applied Mathematics Journal
SP  - 89
EP  - 100
PB  - Science Publishing Group
SN  - 2326-9812
UR  - https://doi.org/10.11648/j.pamj.20170603.11
AB  - Arithmetic Logic Unit (ALU) is a fundamental building block of a central processing unit (CPU) in any computing system. The ALU is the hardware that performs logical (and, or, xor) and basic arithmetic (addition, subtraction, multiplication, division) operations. Thus, its construction requires techniques in which the treatment of operands should be consistent with operations rules. In this paper, ALU based on matrix calculation introduced and developed by Raoelina Andriambololona is proposed. These techniques aim to remove illogic and inconsistent appearing in the international writing numeration with the usual rules in arithmetic. We also propose the design of code converters which convert Binary to BCD (Binary Coded Decimal) code and vice versa using matrix calculation.
VL  - 6
IS  - 3
ER  -

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Author Information

Nirina Gilbert Rasolofoson

Theoretical Physics Department, Institut National des Sciences et Techniques Nucléaires (INSTN-Madagascar), Antananarivo, Madagascar
Raoelina Andriambololona

Theoretical Physics Department, Institut National des Sciences et Techniques Nucléaires (INSTN-Madagascar), Antananarivo, Madagascar

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APA Style

Nirina Gilbert Rasolofoson, Raoelina Andriambololona. (2017). Design of ALU and Code Converter Using Matrix Calculation. Pure and Applied Mathematics Journal, 6(3), 89-100. https://doi.org/10.11648/j.pamj.20170603.11

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ACS Style

Nirina Gilbert Rasolofoson; Raoelina Andriambololona. Design of ALU and Code Converter Using Matrix Calculation. Pure Appl. Math. J. 2017, 6(3), 89-100. doi: 10.11648/j.pamj.20170603.11

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AMA Style

Nirina Gilbert Rasolofoson, Raoelina Andriambololona. Design of ALU and Code Converter Using Matrix Calculation. Pure Appl Math J. 2017;6(3):89-100. doi: 10.11648/j.pamj.20170603.11

Copy | Download

@article{10.11648/j.pamj.20170603.11,
  author = {Nirina Gilbert Rasolofoson and Raoelina Andriambololona},
  title = {Design of ALU and Code Converter Using Matrix Calculation},
  journal = {Pure and Applied Mathematics Journal},
  volume = {6},
  number = {3},
  pages = {89-100},
  doi = {10.11648/j.pamj.20170603.11},
  url = {https://doi.org/10.11648/j.pamj.20170603.11},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.pamj.20170603.11},
  abstract = {Arithmetic Logic Unit (ALU) is a fundamental building block of a central processing unit (CPU) in any computing system. The ALU is the hardware that performs logical (and, or, xor) and basic arithmetic (addition, subtraction, multiplication, division) operations. Thus, its construction requires techniques in which the treatment of operands should be consistent with operations rules. In this paper, ALU based on matrix calculation introduced and developed by Raoelina Andriambololona is proposed. These techniques aim to remove illogic and inconsistent appearing in the international writing numeration with the usual rules in arithmetic. We also propose the design of code converters which convert Binary to BCD (Binary Coded Decimal) code and vice versa using matrix calculation.},
 year = {2017}
}

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TY  - JOUR
T1  - Design of ALU and Code Converter Using Matrix Calculation
AU  - Nirina Gilbert Rasolofoson
AU  - Raoelina Andriambololona
Y1  - 2017/05/27
PY  - 2017
N1  - https://doi.org/10.11648/j.pamj.20170603.11
DO  - 10.11648/j.pamj.20170603.11
T2  - Pure and Applied Mathematics Journal
JF  - Pure and Applied Mathematics Journal
JO  - Pure and Applied Mathematics Journal
SP  - 89
EP  - 100
PB  - Science Publishing Group
SN  - 2326-9812
UR  - https://doi.org/10.11648/j.pamj.20170603.11
AB  - Arithmetic Logic Unit (ALU) is a fundamental building block of a central processing unit (CPU) in any computing system. The ALU is the hardware that performs logical (and, or, xor) and basic arithmetic (addition, subtraction, multiplication, division) operations. Thus, its construction requires techniques in which the treatment of operands should be consistent with operations rules. In this paper, ALU based on matrix calculation introduced and developed by Raoelina Andriambololona is proposed. These techniques aim to remove illogic and inconsistent appearing in the international writing numeration with the usual rules in arithmetic. We also propose the design of code converters which convert Binary to BCD (Binary Coded Decimal) code and vice versa using matrix calculation.
VL  - 6
IS  - 3
ER  -

Copy | Download